A Non-blocking Global Virtual Time Algorithm with Logarithmic Number of Memory Operations

Mauro Ianni, Romolo Marotta, Alessandro Pellegrini, and Francesco Quaglia


Published in: Proceedings of the 21st IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications
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Abstract:
The increasing diffusion of shared-memory multi-core machines has given rise to a change in the design of Parallel Discrete Event Simulation (PDES) platforms. In particular, the possibility to share large amounts of memory by many worker threads has lead to a boost in the adoption of non-blocking coordination algorithms, which have been proven to offer higher scalability when compared to their blocking counterparts based on critical sections. In this article we present an innovative non-blocking algorithm for computing Global Virtual Time (GVT)—namely, the current commit horizon—in multi-thread PDES engines to be run on top of multi-core machines. Beyond being non-blocking, our proposal has the advantage of providing a logarithmic (rather than linear) number of per-thread memory operations—read/write operations of values involved in the reduction for computing the GVT value—vs the amount of threads participating in the GVT computation. This allows for keeping low the actual CPU time that is required for determining the new GVT value. We compare our algorithm with a literature solution, still based on the non-blocking approach, but entailing a linear number of memory operations, quantifying the advantages from our proposal especially for very large numbers of threads participating in the GVT computation.

BibTeX Entry:

@inproceedings{Ian17b,
author = {Ianni, Mauro and Marotta, Romolo and Pellegrini, Alessandro and Quaglia, Francesco},
booktitle = {Proceedings of the 21st IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications},
title = {A Non-blocking Global Virtual Time Algorithm with Logarithmic Number of Memory Operations},
year = {2017},
month = oct,
note = {Shortlisted for the Best Paper Award},
pages = {17--24},
publisher = {IEEE Computer Society},
series = {DS-RT},
doi = {10.1109/DISTRA.2017.8167662},
location = {Rome, Italy},
name = {ds-rt17b}
}